Scalable and Noise-aware Quantum Circuit Compilation and Synthesis Methods
While existing quantum circuit optimization techniques can reduce the quantum circuit depth and gate count, they either omit the layout constraint of the quantum hardware or their noise effects. My research has three main objectives: (1) characterize the impact of quantum hardware errors on quantum circuit outputs, (2) develop error mitigation approaches with a minimum amount of interaction with the quantum hardware, and (3) develop scalable and noise-aware quantum circuit compilation and synthesis techniques
Hardware Security
Hardware Trojan
The distributed supply chain of the semiconductor industry has promoted several attacks at different stages of Integrated Circuit (IC) design and manufacturing. Hardware Trojans (HTs) injected into the IC by a malicious foundry can lead to catastrophic consequences. Recent research efforts have shown the power of Artificial Intelligent (AI) in general and reinforcement learning in particular not only in detecting HTs but also bypassing these detection mechanisms. However, they do not take into account the detailed circuit structural information.
Design-for-Secure Testability
While testing is required to screen out defective Integrated Circuits (ICs), any design effort to improve testability may compromise the security of the ICs. To enhance the testability, the test infrastructure provides internal access to the IC. However, an attacker can leverage the test mode to hack into secure-critical ICs. An IC may embed a secret key used to perform on-chip encryption/decryption, or a microprocessor may have an Intellectual Property (IP) instruction set hardcoded into its ROM; such security-critical data must be protected from attacks that misuse test infrastructure. Samah’s research identified the conditions for a successful attack in the presence of a scan decompressor and a compactor, and developed countermeasures (decompressor output swapping and scan cell swapping) to ensure that these conditions are never met.
Secure Quantum Systems
My research goal is to bridge the gap in cyber security between theoretical foundation of secure quantum computing and the limitation of near-term and realistic quantum machines. My research has two main objectives: exposing confidentiality and integrity vulnerabilities in quantum hardware and developing effective and efficient defenses for their mitigation